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Release v2.0.0: VaptVupt codec integration, auto codec detection, Jasmin and VaptVupt fixes, multi-arch & performance enhancements, security hardening, ACSL annotations

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Cristian Cezar Moisés 2026-04-05 15:35:49 -03:00
commit 287ca9d3c2
15 changed files with 380 additions and 407 deletions
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2
include/vaptvupt.h
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@ -7,8 +7,6 @@
* VaptVupt Codec — Next-generation lossless compression
* Public API and data structures
*
* SPDX-License-Identifier: GPL-3.0-or-later
* Copyright 2026 Cristian.
* Zero dependencies. Pure C11.
*/
#ifndef VAPTVUPT_H

2
include/vv_ans.h
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@ -101,7 +101,7 @@ vva_error_t vva_decode_ctx(const uint8_t *src, size_t src_len,
*/
#define VVA_ML_CODES 36 /* Match length code count */
#define VVA_OF_CODES 24 /* Offset code count */
#define VVA_OF_CODES 27 /* Offset code count: 3 rep + 24 explicit */
vva_error_t vva_encode_sequences(const uint8_t *tokens, size_t tok_len,
uint8_t *dst, size_t dst_cap, size_t *dst_len,

7
include/zupt.h
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@ -75,6 +75,7 @@
#define ZUPT_CODEC_ZUPT_LZH 0x0009 /* LZ77 + Huffman */
#define ZUPT_CODEC_ZUPT_LZHP 0x000A /* LZ77 + Huffman + Byte Prediction (default) */
#define ZUPT_CODEC_VAPTVUPT 0x0010 /* VAPTVUPT: VaptVupt LZ + ANS entropy codec */
#define ZUPT_CODEC_AUTO 0xFFFF /* Auto-detect: VaptVupt if AVX2, else LZHP */
/* Crypto */
#define ZUPT_SALT_SIZE 32
@ -326,4 +327,10 @@ const char *zupt_codec_name(uint16_t id);
void zupt_default_options(zupt_options_t *o);
void zupt_format_size(uint64_t bytes, char *buf, size_t cap);
/* Resolve ZUPT_CODEC_AUTO to a concrete codec based on hardware.
* On x86_64 with AVX2: VaptVupt (fast ANS+SIMD decode).
* On all other arches: Zupt-LZHP (no SIMD dependency).
* Decompression of ALL codecs works on ALL architectures. */
uint16_t zupt_resolve_auto_codec(void);
#endif

4
include/zupt_cpuid.h
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@ -9,13 +9,15 @@
typedef struct {
int has_aesni; /* CPUID.01H:ECX[25] — AES-NI instructions */
int has_avx; /* AVX (VEX-encoded SSE) — requires CPUID + OS XSAVE */
int has_pclmul; /* CPUID.01H:ECX[1] — CLMUL (carry-less multiply) */
int has_avx2; /* CPUID.07H:EBX[5] — AVX2 (256-bit SIMD) */
int has_sse41; /* CPUID.01H:ECX[19] — SSE4.1 */
} zupt_cpu_features_t;
/*@ assigns f->has_aesni, f->has_pclmul, f->has_avx2, f->has_sse41;
/*@ assigns f->has_aesni, f->has_avx, f->has_pclmul, f->has_avx2, f->has_sse41;
@ ensures f->has_aesni == 0 || f->has_aesni == 1;
@ ensures f->has_avx == 0 || f->has_avx == 1;
@ ensures f->has_pclmul == 0 || f->has_pclmul == 1;
@ ensures f->has_avx2 == 0 || f->has_avx2 == 1;
@ ensures f->has_sse41 == 0 || f->has_sse41 == 1;